1. Technical Field
The present invention relates to a test wafer unit and a test system. In particular, the present invention relates to a test wafer unit and a test system for testing a plurality of circuits under test formed on a wafer under test.
2. Related Art
One test for a circuit under test having a semiconductor circuit or the like involves judging whether a transmission circuit and a reception circuit of a circuit under test are operating correctly by looping a signal output by the transmission circuit back to the reception circuit. For example, it is possible to judge whether the transmission circuit and the reception circuit are operating properly based on reception results of a signal received by the reception circuit when the transmission circuit outputs a predetermined signal.
A test apparatus for testing a circuit under test includes a main body and a performance board. The performance board is disposed near the device under test and transmits signals between the main body and the device under test. The main body includes modules for testing the circuit under test, and tests the circuit under test via the performance board.
When performing a loop back test on the circuit under test, the test apparatus feeds back the output signal of the circuit under test within the main body, thereby looping the signal back to the circuit under test. For example, see Japanese Patent Application Publication No. 2005-292004 and Japanese Translation of PCT International Application No. 2004-525546.
When looping back the signal in the main body of the test apparatus, however, the transmission path of the loop-back signal is lengthened, thereby causing degradation of the loop-back signal. Therefore, it is difficult to accurately perform a loop-back test. Furthermore, since the resistance and capacitance of the transmission path are relatively large, it is necessary to provide drivers at the signal output ends of the circuit under test and the main body to drive the transmission path. In addition, the locations at which a signal can be taken from the circuit under test are limited to the signal output ends where a driver is provided.
One technique involves shortening the transmission path by feeding back the signal in the performance board. However, when the plurality of circuits under test on the wafer under test are tested en bloc, it is necessary to provide a loop-back path corresponding to each circuit under test on the performance board.
Another technique involves adding prescribed noise to the signal output by the circuit under test and looping back the resulting signal. In this case, a noise generation circuit must be provided in each loop-back path of the performance board. A print substrate is usually used as the performance board, and so it is not easy to dispose on the performance board noise generation circuits corresponding to the circuits under test formed on the wafer under test.